1. Technical Field
Embodiments of the present disclosure are related to manufacturing processes of semiconductor packages, and in particular, to wafer-to-wafer bonding to form a wafer-level system-in-package.
2. Description of the Related Art
There is continuing market pressure to increase the density and reduce the size of the semiconductor devices and packages. Responses to this pressure include the development of chip-scale packaging and wafer-level packaging. Chip-scale packages have a footprint that is very close to the actual area of the semiconductor die and are generally direct surface mountable using flip chip configurations and the like. Wafer-level packages are packages in which some portion of the “back-end” processing is performed on all of the chips at wafer-level, before the wafer is singulated.
Another development of wafer-level packing is the reconstituted wafer, also referred to as a reconfigured wafer, in which a semiconductor wafer is separated into individual dice, which are reformed into a reconstituted wafer to allow for further processing at wafer-level. The dice on the reconstituted wafer are spaced some greater distance apart than on the original wafer and are embedded in a layer of molding compound. One benefit is that this provides increased area for each die for back end processes, such as the formation of contacts at a scale or pitch that is compatible with circuit board limitations, without sacrificing valuable real estate on the original wafer. Some packages of this type are known as fan-out wafer-level packages, because the contact positions of the original die are “fanned out” to a larger foot print.
System-in-package (SiP) is a type of semiconductor package in which multiple devices are enclosed within a package. In some cases, a system-in-package includes one or more devices attached to a back side surface of a first device. Conductive paths, such as through-mold vias, are provided to enable electrical connection of the one or more devices on the back surface of the first device to a front surface of the package. The entire assembly may then be encapsulated.